URISC / OISC: One Instruction Computers

URISC is an abstract computer designed to have a minimal instruction set, only one instruction. URISC is an abbreviation of Ultimate RISC, although technically the machine doesn’t meet the criteria for RISC.

Types of URISC

There are four common types of URISC – MOV, RSSB, SUBLEQ and SUBNEG.

MOV – Transport Triggered Architecture

In a MOV URISC machine there's one instruction with two operands. When the instruction executes, it copies one location in memory to another, using the operands as pointers. Jumps, arithmetic and input / output are achieve with a memory mapped program counter, arithmetic unit and input / output ports.

More information about MOV TTA:

• Transport Triggered Architecture

RSSB – Reverse Subtract and Skip if Borrow

The instruction in a RSSB URISC machine is Reverse Subtract and Skip if Borrow. Each instruction has one operand which is a pointer into memory. When the instruction executes, it subtracts the accumulator from a memory location and stores the result in both. If the value in memory was lower than the accumulator, the next instruction will be skipped. The program counter, accumulator and input / output are mapped to memory.

More information about RSSB:

• The Ultimate RISC, One Instruction Computers
• Hello World for the RSSB Virtual Computer
• Redcode Interpreter for the RSSB Virtual Computer

SUBNEG – Subtract and Branch if Negative

Also abbreviated to SBN, a SUBNEG computer uses an instruction with three operands. When executed, SUBNEG subtracts the contents of the first memory location from a second location, storing the result in the second. If the first value was higher than the second, SUBNEG jumps to where the third operand points. Input / output are memory mapped.

More information about SUBNEG:

• A SBN Computer Built from 74xx Gates

SUBLEQ – Subtract and Branch if Less than or Equal

SUBLEQ is similar to a SUBNEG computer, but also branches if the contents of the two memory locations is identical.

More information about SUBLEQ:

• Hello‚ World! in SUBLEQ Assembly
• The SUBLEQ URISC / OISC Architecture
• SUBLEQ Interpreter in Redcode
• SUBLEQ Self Interpreter

Other Types of OISC

There have been several attempts to simplify OISC even further.  Here are a couple of examples:

• DJN OISC
• BitBitJump

The Ultimate RISC, One Instruction Set Computers

A One Instruction Set Computer is a virtual computer designed to use only one instruction. There are two common methods to implement a OISC:

Reverse Subtract and Skip if Borrow

The instruction has one operand which points to a memory location. The program counter is stored at location 0 and the accumulator at location 1. Location 2 always contains zero, location 3 is used for input and location 4 for output.

RSSB subtracts the accumulator from the contents of a memory location, storing the result in both.  If the accumulator was greater than the memory location, the next instruction will be skipped. Jumps can be implemented by manipulating location 0.

Subtract and Branch if Negative

SBN requires three operands, a, b and c.  The contents of memory location a is subtracted from the contents of b and the result is stored in b. If the value originally stored in a was greater than the value in b, SBN will jump to c. A variation on the theme is Subtract and Branch unless Positive.

I'll publish my implementation in Redcode shortly. In the meantime, why not take a look at projects listed below. If you're aware of any other implementations, please leave a comment with the details.

• Luke Valenty built a SBN machine using 7400 series logic gates
  
• Clive Gifford has written a SUBLEQ self-interpreter
• Oleg Mazonka implemented a SUBLEQ interpreter in C++
• Safalra has designed a variation called MISC